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Novel lightweight FF-APUF design for FPGA., , , and . SoCC, page 75-80. IEEE, (2016)Theoretical Analysis of Configurable RO PUFs and Strategies to Enhance Security., , , , , , and . SiPS, page 91-96. IEEE, (2019)An Efficient Hardware Accelerator of High-Speed NTT for CRYSTALS-Kyber Post-Quantum Cryptography., , , , and . ACSSC, page 1-6. IEEE, (2023)A Flip-Flop Based Arbiter Physical Unclonable Function (APUF) Design with High Entropy and Uniqueness for FPGA Implementation., , , , , and . IEEE Trans. Emerg. Top. Comput., 9 (4): 1853-1866 (2021)A Lightweight and Efficient Schoolbook Polynomial Multiplier for Saber., , , , , and . ISCAS, page 2251-2255. IEEE, (2022)Dynamically Configurable Physical Unclonable Function based on RRAM Crossbar., , , , and . NANOARCH, page 1-6. IEEE, (2021)Dynamic Reconfigurable PUFs Based on FPGA., , , , , and . SiPS, page 79-84. IEEE, (2019)High-Throughput Polynomial Multiplier for Accelerating Saber on FPGA., , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 70 (9): 3584-3588 (September 2023)Modelling Attack Analysis of Configurable Ring Oscillator (CRO) PUF Designs., , , , , and . DSP, page 1-5. IEEE, (2018)An RRAM-based PUF with Adjustable Programmable Voltage and Multi-Mode Operation., , , , and . NANOARCH, page 20:1-20:5. ACM, (2023)