Author of the publication

Data-Reuse and Parallel Embedded Architectures for Low-Power, Real-Time Multimedia Applications.

, , , , , , and . PATMOS, volume 1918 of Lecture Notes in Computer Science, page 243-254. Springer, (2000)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Power, performance and area exploration of block matching algorithms mapped on programmable processors., , , , , , , and . ICIP (3), page 728-731. IEEE, (2001)Image reconstruction on a special purpose array processor., and . Image Vis. Comput., 10 (7): 479-484 (1992)Trade-Off Analysis of a Low-Power Image Coding Algorithm., , , and . VLSI Signal Processing, 18 (1): 65-80 (1998)A Fast DCT Processor, Based on Special Purpose CORDIC Rotators., , , and . ISCAS, page 271-274. IEEE, (1994)Low power synthesis of sum-of-product computation in DSP algorithms., , , and . ISCAS (6), page 420-423. IEEE, (1999)The VLSI implementation of a baseband receiver for DECT-based portable applications., , , , , , , , , and . ISCAS (1), page 198-201. IEEE, (1999)Power exploration of multimedia applications realized on embedded cores., , , and . ISCAS (4), page 378-381. IEEE, (1999)An efficient probabilistic method for logic circuits using real delay gate model., , , , and . ISCAS (1), page 286-289. IEEE, (1999)Performance comparison of DWT scheduling alternatives on programmable platforms., , , , , and . ISCAS (2), page 761-764. IEEE, (2001)A methodology for speeding up matrix vector multiplication for single/multi-core architectures., , , and . J. Supercomput., 71 (7): 2644-2667 (2015)