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Disambiguation of "Bull, David M."

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Selective time borrowing for DSP pipelines with hybrid voltage control loop.

, , , and . ASP-DAC, page 763-768. IEEE, (2012)

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David M Eche

David M Eche

David M Allen

David M Stec

Udalrich Büll

 

Other publications of authors with the same name

RazorII: In Situ Error Detection and Correction for PVT and SER Tolerance., , , , , , , and . IEEE J. Solid State Circuits, 44 (1): 32-48 (2009)A 1GHz hardware loop-accelerator with razor-based dynamic adaptation for energy-efficient operation., , , and . CICC, page 1-4. IEEE, (2013)A low-power 1GHz razor FIR accelerator with time-borrow tracking pipeline and approximate error correction in 65nm CMOS., , and . ISSCC, page 428-429. IEEE, (2013)Error-resilient low-power DSP via path-delay shaping., , , and . DAC, page 1008-1013. ACM, (2011)A power-efficient 32b ARM ISA processor using timing-error detection and correction for transient-error tolerance and adaptation to PVT variation., , , , , and . ISSCC, page 284-285. IEEE, (2010)Analysis of adaptive clocking technique for resonant supply voltage noise mitigation., , and . ISLPED, page 128-133. IEEE, (2015)A 0.6V all-digital body-coupled wakeup transceiver for IoT applications., , , , and . VLSIC, page 98-. IEEE, (2015)GeST: An Automatic Framework For Generating CPU Stress-Tests., , , , and . ISPASS, page 1-10. IEEE, (2019)Addressing design margins through error-tolerant circuits., , , , and . DAC, page 11-12. ACM, (2009)14.6 An all-digital power-delivery monitor for analysis of a 28nm dual-core ARM Cortex-A57 cluster., , , and . ISSCC, page 1-3. IEEE, (2015)