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BitBrain and Sparse Binary Coincidence (SBC) memories: Fast, robust learning and inference for neuromorphic architectures.

, , , and . Frontiers Neuroinformatics, (March 2023)

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Correctness and performance of the SpiNNaker architecture., and . IJCNN, page 1-8. IEEE, (2013)An admission control system for QoS provision on a best-effort GALS interconnect., , , and . ACSD, page 200-207. IEEE, (2008)A Novel Programmable Parallel CRC Circuit., and . IEEE Trans. Very Large Scale Integr. Syst., 19 (10): 1898-1902 (2011)Efficient Reward-Based Structural Plasticity on a SpiNNaker 2 Prototype., , , , , , , , , and . CoRR, (2019)Dynamic Power Management for Neuromorphic Many-Core Systems., , , , , , , , , and 5 other author(s). IEEE Trans. Circuits Syst. I Regul. Pap., 66-I (8): 2973-2986 (2019)Unsupervised STDP-based Radioisotope Identification Using Spiking Neural Networks Implemented on SpiNNaker., , , , , , and . EBCCSP, page 1-8. IEEE, (2022)Biologically-Inspired Massively-Parallel Architectures: A Reconfigurable Neural Modelling Platform.. ARC, volume 6578 of Lecture Notes in Computer Science, page 2. Springer, (2011)NeuroBench: Advancing Neuromorphic Computing through Collaborative, Fair and Representative Benchmarking., , , , , , , , , and 61 other author(s). CoRR, (2023)Parallel Distribution of an Inner Hair Cell and Auditory Nerve Model for Real-Time Application., , , , and . IEEE Trans. Biomed. Circuits Syst., 12 (5): 1018-1026 (2018)Distributed configuration of massively-parallel simulation on SpiNNaker neuromorphic hardware., , and . IJCNN, page 1099-1105. IEEE, (2011)