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Disambiguation of "Flynn, Michael P."

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A Simultaneous Multiband Continuous-Time ΔΣ ADC With 90-MHz Aggregate Bandwidth in 40-nm CMOS.

, and . ESSCIRC, page 1-4. IEEE, (2019)

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Robynne Flynn-Diez

Choi-Yeung-Chang Flynn

Sharon Flynn

Linda Jessica Flynn

Michael P Maier

 

Other publications of authors with the same name

A wirelessly powered log-based closed-loop deep brain stimulation SoC with two-way wireless telemetry for treatment of neurological disorders., , , , , and . VLSIC, page 70-71. IEEE, (2012)Enabling closed-loop neural interface: A bi-directional interface circuit with stimulation artifact cancellation and cross-channel CM noise suppression., , , , , and . VLSIC, page 108-. IEEE, (2015)A Flexible 500 MHz to 3.6 GHz Wireless Receiver with Configurable DT FIR and IIR Filter Embedded in a 7b 21 MS/s SAR ADC., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 59-I (12): 2846-2857 (2012)A 64 Channel Programmable Closed-Loop Neurostimulator With 8 Channel Neural Amplifier and Logarithmic ADC., , , and . IEEE J. Solid State Circuits, 45 (9): 1935-1945 (2010)A 16-Element 4-Beam 1 GHz IF 100 MHz Bandwidth Interleaved Bit Stream Digital Beamformer in 40 nm CMOS., , , and . IEEE J. Solid State Circuits, 53 (5): 1302-1312 (2018)A new transponder architecture for long-range telemetry applications., and . ECCTD, page 177-180. IEEE, (2005)6GS/s 8-channel CIC SAR TI-ADC with Neural Network Calibration., , , and . ESSCIRC, page 325-328. IEEE, (2022)A "digital" 6-bit ADC in 0.25-μm CMOS., and . IEEE J. Solid State Circuits, 37 (3): 432-437 (2002)A 0.024mm² 84.2dB-SNDR 1MHz-BW 3rd-Order VCO-Based CTDSM with NS-SAR Quantizer (NSQ VCO CTDSM)., , and . VLSI Technology and Circuits, page 1-2. IEEE, (2023)A 150-MS/s Fully Dynamic SAR-Assisted Pipeline ADC Using a Floating Ring Amplifier and Gain-Enhancing Miller Negative-C., , , and . VLSI Technology and Circuits, page 1-2. IEEE, (2023)