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Serial Application Accelerating with Pipelined Configuration Slicing on Dynamic Reconfigurable Hardware.

, , , and . ESA, page 85-91. CSREA Press, (2009)

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Critical-Path Driven Routers for on-Chip Networks., , , and . Journal of Circuits, Systems, and Computers, 19 (7): 1543-1557 (2010)A Selective Read-before-Write Scheme for Energy-Aware Spin Torque Transfer RAM (STT-RAM) Cache Design., , , and . Journal of Circuits, Systems, and Computers, (2013)The Modeling for Dynamic Power Management of Embedded Systems., , , and . ICESS, volume 3605 of Lecture Notes in Computer Science, page 462-467. Springer, (2004)Battery-aware task scheduling in distributed mobile systems with lifetime constraint., , , and . ASP-DAC, page 743-748. IEEE, (2011)Global register alias table: Boosting sequential program on multi-core., , , and . Future Gener. Comput. Syst., 28 (6): 957-964 (2012)Shared write buffer to boost applications on SpMT architecture., , , and . J. Supercomput., 73 (8): 3508-3525 (2017)SmartMig: A Case for Page Migration and Self-Interleaving for On-Chip Distributed Memory Systems., , , , , and . HPCC/CSS/ICESS, page 701-704. IEEE, (2014)Faculty Training of Computer Hardware Courses Based on University-enterprise Cooperation., , , and . HPCC-ICESS, page 1668-1672. IEEE Computer Society, (2012)A Cross-platform Application Development Environment Supported by Cloud Service., , , , and . HPCC-ICESS, page 1421-1427. IEEE Computer Society, (2012)Incremental Run-time Application Mapping for Heterogeneous Network on Chip., , and . HPCC-ICESS, page 485-492. IEEE Computer Society, (2012)