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Synthesis of Hazard-Free Asynchronous Circuits from Graphical Specifications.

, , and . ICCAD, page 322-325. IEEE Computer Society, (1991)

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Circuit Structure Relations to Redundancy and Delay: The KMS Algorithm Revisited., , and . DAC, page 245-248. IEEE Computer Society Press, (1992)On the Temporal Equivalence of Sequential Circuits., , , and . DAC, page 405-409. IEEE Computer Society Press, (1992)Exact Minimum Cycle Times for Finite State Machines., , and . DAC, page 100-105. ACM Press, (1994)Circuit Delay Models and Their Exact Computation Using Timed Boolean Functions., , and . DAC, page 128-134. ACM Press, (1993)Heuristic Minimization of BDDs Using Don't Cares., , , and . DAC, page 225-231. ACM Press, (1994)Sequential Synthesis for Table Look Up Programmable Gate Arrays., , and . DAC, page 224-229. ACM Press, (1993)A Unified Approach to Language Containment and Fair CTL Model Checking., , , and . DAC, page 475-481. ACM Press, (1993)Formula-Dependent Equivalence for Compositional CTL Model Checking., , , , and . Formal Methods Syst. Des., 21 (2): 193-224 (2002)State Minimization of Pseudo Non-Deterministic FSM's., and . EDAC-ETC-EUROASIC, page 184-191. IEEE Computer Society, (1994)The Rabin Index and Chain Automata, with Applications to Automatas and Games., , , and . CAV, volume 939 of Lecture Notes in Computer Science, page 253-266. Springer, (1995)