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Disambiguation of "Schaumont, Patrick"

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Design and benchmarking of an ASIC with five SHA-3 finalist candidates.

, , , , , , and . Microprocess. Microsystems, 37 (2): 246-257 (2013)

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To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Patrick Pfeffer

Optimiertes Design kombinatorischer Verbindungsbibliotheken durch genetische Algorithmen und deren Bewertung anhand wissensbasierter Protein-Ligand-Bindungsprofile. Uni Marburg, (2009)

Patrick Hansen

Entwicklung eines energetischen Sanierungsmodells für den europäischen Wohngebäudesektor unter dem Aspekt der Erstellung von Szenarien für Energie- und Co_1tn2-Einsparpotenziale bis 2030. Uni Siegen, (2009)

Patrick Hemberger

Patrick Steuer

Patrick Barthold

 

Other publications of authors with the same name

Offline Hardware/Software Authentication for Reconfigurable Platforms., and . CHES, volume 4249 of Lecture Notes in Computer Science, page 311-323. Springer, (2006)Differential Power Analysis of MAC-Keccak at Any Key-Length., and . IWSEC, volume 8231 of Lecture Notes in Computer Science, page 68-82. Springer, (2013)Design of Cam-E-leon, a Run-Time Reconfigurable Web Camera., , , , , , , , , and . Embedded Processor Design Challenges, volume 2268 of Lecture Notes in Computer Science, page 274-290. Springer, (2002)Building a Virtual Framework for Networked Reconfigurable Hardware and Software Objects., , , , and . PDPTA, CSREA Press, (2000)ImpedanceVerif: On-Chip Impedance Sensing for System-Level Tampering Detection., , and . IACR Trans. Cryptogr. Hardw. Embed. Syst., 2023 (1): 301-325 (2023)Guest Editors' Introduction: Security and Trust in Embedded-Systems Design., and . IEEE Des. Test Comput., 24 (6): 518-520 (2007)Synthesis of multi-rate and variable rate circuits for high speed telecommunications applications., , , , and . ED&TC, page 542-546. IEEE Computer Society, (1997)A Hardware-Accelerated ECDLP with High-Performance Modular Multiplication., , and . Int. J. Reconfigurable Comput., (2012)A novel microprocessor-intrinsic Physical Unclonable Function., and . FPL, page 380-387. IEEE, (2012)A side-channel leakage free coprocessor IC in 0.18µm CMOS for embedded AES-based cryptographic and biometric processing., , , , , , and . DAC, page 222-227. ACM, (2005)