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Disambiguation of "Yuan, Jiann-Shiun"

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Delay-insensitive gate-level pipelining.

, , , , and . Integr., 30 (2): 103-131 (2001)

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Jiann-Sheng Wu

Jiann-Trzuo Lin

Jiann-Chyuan Lin

Fang Yuan

Jing Yuan

 

Other publications of authors with the same name

Optimization of NULL convention self-timed circuits., , , , and . Integr., 37 (3): 135-165 (2004)Substrate Bias Effect on Dynamic Characteristics of a Monolithically Integrated GaN Half-Bridge., , , , and . IRPS, page 1-5. IEEE, (2020)Emerging Technology-Based Design of Primitives for Hardware Security., , , , , , , , and . ACM J. Emerg. Technol. Comput. Syst., 13 (1): 3:1-3:19 (2016)Electro-thermal stress effect on InGaP/GaAs heterojunction bipolar low-noise amplifier performance., , and . Microelectron. Reliab., 50 (3): 365-369 (2010)Delay-insensitive gate-level pipelining., , , , and . Integr., 30 (2): 103-131 (2001)RazorNet: Adversarial Training and Noise Training on a Deep Neural Network Fooled by a Shallow Neural Network., , and . Big Data Cogn. Comput., 3 (3): 43 (2019)Statistical sensitivity simulation for integrating design and testing of MOSFET integrated circuits., , , and . VTS, page 104-108. IEEE Computer Society, (1991)Capacitor-less RRAM-based stochastic neuron for event-based unsupervised learning., and . BioCAS, page 1-4. IEEE, (2017)Ultra-Low Power Successive Approximation Analog-to-Digital Converter Using Emerging Tunnel Field Effect Transistor Technology., and . J. Low Power Electron., 12 (3): 218-226 (2016)Security analysis of computing systems from circuit-architectural perspective., and . DSC, page 166-173. IEEE, (2017)