( en | de | ru )

 

Disambiguation

From post

копироватьудалитьдобавить публикацию в буфер
Exploration of GPGPU Register File Architecture Using Domain-wall-shift-write based Racetrack Memory.

, , , , и . DAC, стр. 196:1-196:6. ACM, (2014)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

Zhang Zhang

Meng Zhang

Methods and implementations of road-network matching. TU München, (2009)

Shuying Zhang

Fuqing Zhang

Yong Zhang

 

Другие публикации лиц с тем же именем

The analysis of resolution for cable-driven haptic device., , , и . ROBIO, стр. 715-719. IEEE, (2010)Giant Spin-Hall assisted STT-RAM and logic design., , , , , , и . Integr., (2017)On-chip caches built on multilevel spin-transfer torque RAM cells and its optimizations., , , , , и . ACM J. Emerg. Technol. Comput. Syst., 9 (2): 16:1-16:22 (2013)SRAM-Based Processing-In-Memory Design with Kullback-Leibler Divergence-Based Dynamic Precision Quantization., , , , , , , и . ACM Great Lakes Symposium on VLSI, стр. 189-192. ACM, (2023)Giant spin hall effect (GSHE) logic design for low power application., , , , и . DATE, стр. 1000-1005. ACM, (2015)iFeel6-BH1500: A large-scale 6-DOF haptic device., , , , и . VECIMS, стр. 121-125. IEEE, (2012)Workspace analysis of a novel 6-dof cable-driven parallel robot., , , и . ROBIO, стр. 2403-2408. IEEE, (2009)Loadsa: A yield-driven top-down design method for STT-RAM array., , , и . ASP-DAC, стр. 291-296. IEEE, (2013)Exploration of GPGPU Register File Architecture Using Domain-wall-shift-write based Racetrack Memory., , , , и . DAC, стр. 196:1-196:6. ACM, (2014)ADAMS: asymmetric differential STT-RAM cell structure for reliable and high-performance applications., , , , и . ICCAD, стр. 9-16. IEEE, (2013)