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A Low-Complexity Algorithm and Its Low-Power and High-Throughput Architecture for 3D-HEVC DMM-1 Encoding Tool.

, , , , и . LASCAS, стр. 1-4. IEEE, (2020)

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Afonso Arriaga

Afonso Costa

George Afonso

Virgílio Afonso Silva

Verónica Afonso Rodríguez

 

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Quality-power configurable flexible coding order hardware design for real-time 3D-HEVC intra-frame prediction., , , , , и . J. Real Time Image Process., 19 (5): 969-984 (2022)A Hardware Design for 3D-HEVC Depth Intra Skip with Synthesized View Distortion Change., , , , и . SBCCI, стр. 1-6. IEEE, (2020)A multi-standard interpolation filter for motion compensated prediction on high definition videos., , , , , и . LASCAS, стр. 1-4. IEEE, (2015)A Low-Complexity Algorithm and Its Low-Power and High-Throughput Architecture for 3D-HEVC DMM-1 Encoding Tool., , , , и . LASCAS, стр. 1-4. IEEE, (2020)6WR: A Hardware Friendly 3D-HEVC DMM-1 Algorithm and its Energy-Aware and High-Throughput Design., , , , , и . IEEE Trans. Circuits Syst. II Express Briefs, 67-II (5): 836-840 (2020)Low-Power and High-Throughput Architecture for 3D-HEVC Depth Modeling Mode 4., , , , , , и . SBCCI, стр. 1-6. IEEE, (2018)HEVC Fractional Motion Estimation complexity reduction for real-time applications., , , , и . LASCAS, стр. 1-4. IEEE, (2014)An efficient sub-sample interpolator hardware for VP9-10 standards., , , , , , , и . ICIP, стр. 2167-2171. IEEE, (2016)Energy-Aware Motion and Disparity Estimation System for 3D-HEVC With Run-Time Adaptive Memory Hierarchy., , , , , , , , , и . IEEE Trans. Circuits Syst. Video Technol., 29 (6): 1878-1892 (2019)Low-power and high-throughput hardware design for the 3D-HEVC depth intra skip., , , , , , , и . ISCAS, стр. 1-4. IEEE, (2017)