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Disambiguation of "Ainspan, Herschel A."

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14nm FinFET based supply voltage boosting techniques for extreme low Vmin operation.

, , , , and . VLSIC, page 268-. IEEE, (2015)

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Andreas Herschel

Olga Herschel

Wilhelm Herschel

Knut Herschel

Daniela Herschel

 

Other publications of authors with the same name

CMOS circuits for Gb/s serial data communication., , , , , and . IBM J. Res. Dev., 39 (1-2): 73-82 (1995)Experimental Analysis of Substrate Noise Effect on PLL Performance., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 55-II (7): 638-642 (2008)Functional block extraction for hardware security detection using time-integrated and time-resolved emission measurements., , and . VTS, page 1-6. IEEE Computer Society, (2014)A 1.8-pJ/bit 16×16-Gb/s source synchronous parallel interface in 32nm SOI CMOS with receiver redundancy for link recalibration., , , , , , , , and . CICC, page 1-4. IEEE, (2015)A 5.2 GHz 3.3 V I/Q SiGe RF transceiver., , and . CICC, page 217-220. IEEE, (1999)FEC-Free 60-Gb/s Silicon Photonic Link Using SiGe-Driver ICs Hybrid-Integrated with Photonics-Enabled CMOS., , , , , , , , , and 1 other author(s). OFC, page 1-3. IEEE, (2018)Bang-bang digital PLLs at 11 and 20GHz with sub-200fs integrated jitter for high-speed serial communication applications., , , , , , and . ISSCC, page 94-95. IEEE, (2009)TCAD structure synthesis and capacitance extraction of a voltage-controlled oscillator using automated layout-to-device synthesis methodology., , , , , , and . CICC, page 1-4. IEEE, (2014)A 250-mW 60-GHz CMOS Transceiver SoC Integrated With a Four-Element AiP Providing Broad Angular Link Coverage., , , , , , , , , and 2 other author(s). IEEE J. Solid State Circuits, 55 (6): 1516-1529 (2020)Digital-to-Analog Converters for 100+ Gb/s Wireline Transmitters: Architectures, Circuits, and Calibration., , , , , , , , , and 1 other author(s). CICC, page 1-8. IEEE, (2024)