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Design for Eliminating Operation Specific Power Signatures from Digital Logic.

, , , , and . ACM Great Lakes Symposium on VLSI, page 111-116. ACM, (2019)

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Exploiting Memristive Crossbar Memories as Dual-Use Security Primitives in IoT Devices., , and . ISVLSI, page 615-620. IEEE Computer Society, (2017)Direct Numerical Simulation of Fully-Developed Turbulent Channel Flow Using the Lattice Boltzmann Method and Analysis of OpenMP Scalability., , and . HPCS, volume 5976 of Lecture Notes in Computer Science, page 1-19. Springer, (2009)Design of a Reconfigurable Chaos Gate with Enhanced Functionality Space in 65nm CMOS., , , , and . MWSCAS, page 1016-1019. IEEE, (2018)A Designer's Rationale for Nanoelectronic Hardware Security Primitives., , and . ISVLSI, page 194-199. IEEE Computer Society, (2016)Chaos computing for mitigating side channel attack., , , and . HOST, page 143-146. IEEE Computer Society, (2018)Memristor Crossbar PUF based Lightweight Hardware Security for IoT., , , , and . ICCE, page 1-4. IEEE, (2019)MPI Scalability of a Large Memory LES Code., and . HPCS, page 55-61. University of Manitoba, Department of Computer Science, (2004)A Practical Sense Amplifier Design for Memristive Crossbar Circuits (PUF)., and . SoCC, page 209-214. IEEE, (2018)On the Theoretical Analysis of Memristor based True Random Number Generator., , and . ACM Great Lakes Symposium on VLSI, page 21-26. ACM, (2019)Efficient Medium Access Control with IEEE 802.11 for Mobile Ad Hoc Networks., , and . ICWN, page 413-419. CSREA Press, (2009)