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Algebraic Side-Channel Analysis in the Presence of Errors., , , and . CHES, volume 6225 of Lecture Notes in Computer Science, page 428-442. Springer, (2010)Area, Delay, and Power Characteristics of Standard-Cell Implementations of the AES S-Box., , , and . J. Signal Process. Syst., 50 (2): 251-261 (2008)Evaluation of a DPA-Resistant Prototype Chip., and . ACSAC, page 43-50. IEEE Computer Society, (2009)An introduction to implementation attacks and countermeasures.. MEMOCODE, page 108-115. IEEE, (2009)Practical Attacks on Masked Hardware., , and . CT-RSA, volume 5473 of Lecture Notes in Computer Science, page 211-225. Springer, (2009)Evaluation of the Masked Logic Style MDPL on a Prototype Chip., , , and . CHES, volume 4727 of Lecture Notes in Computer Science, page 81-94. Springer, (2007)Side-Channel Leakage of Masked CMOS Gates., , and . CT-RSA, volume 3376 of Lecture Notes in Computer Science, page 351-365. Springer, (2005)Configurable logic style translation based on an openaccess engine., , , and . ICECS, page 1-4. IEEE, (2005)Power Analysis Attacks and Countermeasures., , and . IEEE Des. Test Comput., 24 (6): 535-543 (2007)Implementation aspects of the DPA-resistant logic style MDPL., and . ISCAS, IEEE, (2006)