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A load-adaptive, low switching-noise data output buffer.

, , , , , и . ISCAS (1), стр. 39-42. IEEE, (1999)

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Wonchan Kim

Ky ng Kim

Die Artikelstruktur in passiven zweisprachigen Wörterbüchern Deutsch-Koreanisch: Konzeption zur Erstellung eines zweisprachigen Lernerwörterbuchs Deutsch-Koreanisch. Uni Heidelberg, (2008)

Bongcheol Kim

Kim Gerber

Youngsang Kim

 

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Full-CMOS 2-GHz WCDMA direct conversion transmitter and receiver., , , , , , , , , и . IEEE J. Solid State Circuits, 38 (1): 43-53 (2003)A load-adaptive, low switching-noise data output buffer., , , , , и . ISCAS (1), стр. 39-42. IEEE, (1999)A dual-mode direct-conversion CMOS transceiver for Bluetooth and 802.11b., , , , , , , , , и 1 other автор(ы). ESSCIRC, стр. 225-228. IEEE, (2003)A 2.8Gb/s All-Digital CDR with a 10b Monotonic DCO., , , , и . ISSCC, стр. 222-598. IEEE, (2007)A single-chip 2.4-GHz direct-conversion CMOS receiver for wireless local loop using multiphase reduced frequency conversion technique., , , , , , и . IEEE J. Solid State Circuits, 36 (5): 800-809 (2001)A 5-Gb/s 0.25-μm CMOS jitter-tolerant variable-interval oversampling clock/data recovery circuit., , , , , , , , , и . IEEE J. Solid State Circuits, 37 (12): 1822-1830 (2002)A ±1.5V 4MHz Low-Pass Gm-C Filter in CMOS., и . ASP-DAC, стр. 341-342. IEEE, (1998)A 0.25-µm CMOS 1.9-GHz PHS RF Transceiver With a 150-kHz Low-IF Architecture., , , , , , , и . IEEE J. Solid State Circuits, 42 (6): 1318-1327 (2007)A low-voltage, low-power CMOS delay element., , , и . IEEE J. Solid State Circuits, 31 (7): 966-971 (1996)A Semi-Digital Delay Locked Loop for Clock Skew Minimization., , и . VLSI Design, стр. 584-588. IEEE Computer Society, (1999)