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Class-AB output stage design for high-speed three-stage op-amps., , and . ICECS, page 1-4. IEEE, (2009)Design of a 75-nW, 0.5-V subthreshold complementary metal-oxide-semiconductor operational amplifier., , , , and . I. J. Circuit Theory and Applications, 42 (9): 967-977 (2014)Effect of OP-amp Phase Margin on SC SigmaDelta Modulator Performances., , , and . ISCAS, page 3134-3137. IEEE, (2009)Design considerations for fast-settling two-stage Miller-compensated operational amplifiers., , and . ICECS, page 5-8. IEEE, (2009)A new efficient SC integrator scheme for high-speed low-power applications., , and . I. J. Circuit Theory and Applications, 40 (8): 733-744 (2012)Settling Time Optimization for Three-Stage CMOS Amplifier Topologies., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 56-I (12): 2569-2582 (2009)Special session: IEEE Real World Engineering Projects: Discovery-based curriculum modules for first-year students., , , , , , , , , and . FIE, page 1-2. IEEE Computer Society, (2012)Analysis of the Impact of High-Order Integrator Dynamics on SC Sigma-Delta Modulator Performances., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 57-I (3): 618-630 (2010)Settling-Optimization-Based Design Approach for Three-Stage Nested-Miller Amplifiers., , , and . PATMOS, volume 5349 of Lecture Notes in Computer Science, page 318-327. Springer, (2008)Design criterion for high-speed low-power SC circuits., , and . I. J. Circuit Theory and Applications, 39 (10): 1067-1078 (2011)