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A 40-310TOPS/W SRAM-Based All-Digital Up to 4b In-Memory Computing Multi-Tiled NN Accelerator in FD-SOI 18nm for Deep-Learning Edge Applications.

G. Desoli, N. Chawla, T. Boesch, M. Avodhyawasi, H. Rawat, H. Chawla, V. Abhijith, P. Zambotti, A. Sharma, C. Cappetta, M. Rossi, A. Vita, and F. Girardi. ISSCC, page 260-261. IEEE, (2023)

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Giuseppe Olivato

Giuseppe Veltri

Giuseppe Amato

Giuseppe Valenza

Giuseppe Bosco

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DELI: a new run-time control point.G. Desoli, N. Mateev, E. Duesterwald, P. Faraboschi, and J. Fisher. MICRO, page 257-268. ACM/IEEE Computer Society, (2002)Approximate operations in Convolutional Neural Networks with RNS data representation.V. Arrigoni, B. Rossi, P. Fragneto, and G. Desoli. ESANN, (2017)A 40-310TOPS/W SRAM-Based All-Digital Up to 4b In-Memory Computing Multi-Tiled NN Accelerator in FD-SOI 18nm for Deep-Learning Edge Applications.G. Desoli, N. Chawla, T. Boesch, M. Avodhyawasi, H. Rawat, H. Chawla, V. Abhijith, P. Zambotti, A. Sharma, C. Cappetta and 3 other author(s). ISSCC, page 260-261. IEEE, (2023)A New Facility for Dynamic Control of Program Execution: DELI.G. Desoli, N. Mateev, E. Duesterwald, P. Faraboschi, and J. Fisher. EMSOFT, volume 2491 of Lecture Notes in Computer Science, page 305-318. Springer, (2002)Lx: a technology platform for customizable VLIW embedded processing.P. Faraboschi, G. Brown, J. Fisher, G. Desoli, and F. Homewood. ISCA, page 203-213. IEEE Computer Society, (2000)14.1 A 2.9TOPS/W deep convolutional neural network SoC in FD-SOI 28nm for intelligent embedded systems.G. Desoli, N. Chawla, T. Boesch, S. Singh, E. Guidetti, F. Ambroggi, T. Majo, P. Zambotti, M. Ayodhyawasi, H. Singh and 1 other author(s). ISSCC, page 238-239. IEEE, (2017)Computing and design for software and silicon manufacturing.D. Pandini, G. Desoli, and A. Cremonesi. VLSI-SoC, page 122-127. IEEE, (2007)Parallelized Convolutions for Embedded Ultra Low Power Deep Learning SoC.L. Cunial, A. Erdem, C. Silvano, M. Falchetto, A. Ornstein, E. Plebani, G. Desoli, and D. Pau. RTSI, page 1-4. IEEE, (2018)Custom-fit Processors: Letting Applications Define Architectures.J. Fisher, P. Faraboschi, and G. Desoli. MICRO, page 324-335. ACM/IEEE Computer Society, (1996)The Orlando Project: A 28 nm FD-SOI Low Memory Embedded Neural Network ASIC.G. Desoli, V. Tomaselli, E. Plebani, G. Urlini, D. Pau, V. D'Alto, T. Majo, F. Ambroggi, T. Boesch, S. Singh and 2 other author(s). ACIVS, volume 10016 of Lecture Notes in Computer Science, page 217-227. (2016)

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Disambiguation of "Desoli, Giuseppe"

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A 40-310TOPS/W SRAM-Based All-Digital Up to 4b In-Memory Computing Multi-Tiled NN Accelerator in FD-SOI 18nm for Deep-Learning Edge Applications.

Please choose a person to relate this publication to

Giuseppe Olivato

Giuseppe Veltri

Giuseppe Amato

Giuseppe Valenza

Giuseppe Bosco

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Desoli, Giuseppe"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A 40-310TOPS/W SRAM-Based All-Digital Up to 4b In-Memory Computing Multi-Tiled NN Accelerator in FD-SOI 18nm for Deep-Learning Edge Applications.

Please choose a person to relate this publication to

Giuseppe Olivato

Giuseppe Veltri

Giuseppe Amato

Giuseppe Valenza

Giuseppe Bosco

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A 40-310TOPS/W SRAM-Based All-Digital Up to 4b In-Memory Computing Multi-Tiled NN Accelerator in FD-SOI 18nm for Deep-Learning Edge Applications.