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Disambiguation of "Schwarz, Eric M."

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Results on the Interface between Formal Verification and ATPG.

, , , , , and . CAV (DIMACS/AMS volume), volume 3 of DIMACS Series in Discrete Mathematics and Theoretical Computer Science, page 615-628. DIMACS/AMS, (1990)

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Eric W M Roosenboom

Friederike Erichsen-Wendt

Claus Erichsen

Kay Erichsen

Curt Erich

 

Other publications of authors with the same name

CMOS floating-point unit for the S/390 Parallel Enterprise Server G4., , and . IBM J. Res. Dev., 41 (4&5): 475-488 (1997)FPU Implementations with Denormalized Numbers., , and . IEEE Trans. Computers, 54 (7): 825-836 (2005)The SIMD accelerator for business analytics on the IBM z13., , , , , and . IBM J. Res. Dev., (2015)A General Proof for Overlapped Multiple-Bit Scanning Multiplications., , and . IEEE Trans. Computers, 38 (2): 172-183 (1989)Decimal Multiplication with Efficient Partial Product Generation., , and . IEEE Symposium on Computer Arithmetic, page 21-28. IEEE Computer Society, (2005)A Decimal Floating-Point Specification., , , and . IEEE Symposium on Computer Arithmetic, page 147-154. IEEE Computer Society, (2001)ATPG Aspects of FSM Verification., , , , , and . ICCAD, page 134-137. IEEE Computer Society, (1990)On optimal extraction of combinational logic and don't care sets from hardware description languages., , , , and . ICCAD, page 308-311. IEEE Computer Society, (1989)Hard-Wired Multipliers with Encoded Partial Products., , and . IEEE Trans. Computers, 40 (11): 1181-1197 (1991)Correction: IEEE Transactions on Computers 42(1): 127 (1993).A 5.2GHz microprocessor chip for the IBM zEnterprise™ system., , , , , , , , , and 17 other author(s). ISSCC, page 70-72. IEEE, (2011)