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Disambiguation of "Vega, Luis"

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Universal Shape Replicators via Self-Assembly with Attractive and Repulsive Forces.

, , , , , , and . SODA, page 225-238. SIAM, (2017)

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José Luis Vega Expósito

Werner Luis

Pia Luislampe

Mathieu Luisier

Werner Luis

 

Other publications of authors with the same name

Universal Shape Replicators via Self-Assembly with Attractive and Repulsive Forces., , , , , , and . SODA, page 225-238. SIAM, (2017)Programming Abstractions and Efficient Compilation Techniques for Modern FPGAs. University of Washington, USA, (2022)Power Side Channels in Security ICs: Hardware Countermeasures., , and . CoRR, (2016)On the Evolution of the Vortex Filament Equation for Regular M-Polygons with Nonzero Torsion., , and . SIAM J. Appl. Math., 80 (2): 1034-1056 (2020)Moonwalk: NRE Optimization in ASIC Clouds., , , and . ASPLOS, page 511-526. ACM, (2017)Hiding Intermittent Information Leakage with Architectural Support for Blinking., , , , , , and . ISCA, page 638-649. IEEE Computer Society, (2018)Uncertainty principle of Morgan type and Schrödinger evolutions., , , and . J. Lond. Math. Soc., 83 (1): 187-207 (2011)Optimal Staged Self-assembly of Linear Assemblies., , , , , and . UCNC, volume 10867 of Lecture Notes in Computer Science, page 32-45. Springer, (2018)A 1.4 GHz 695 Giga Risc-V Inst/s 496-Core Manycore Processor With Mesh On-Chip Network and an All-Digital Synthesized PLL in 16nm CMOS., , , , , , , , , and 11 other author(s). VLSI Circuits, page 30-. IEEE, (2019)Optimal Staged Self-Assembly of General Shapes., , , , , and . ESA, volume 57 of LIPIcs, page 26:1-26:17. Schloss Dagstuhl - Leibniz-Zentrum für Informatik, (2016)