( en | de | ru )

 

Disambiguation

From post

копироватьудалитьдобавить публикацию в буфер
A "New Ara" for Vector Computing: An Open Source Highly Efficient RISC-V V 1.0 Vector Processor Design.

, , , , , и . ASAP, стр. 43-51. IEEE, (2022)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

Jochen Benini

Anke Benini

Aldo Albert Benini

Luca Rizzini

Luca Tranchini

 

Другие публикации лиц с тем же именем

Virtual Simulation of Distributed IP-based Designs., , и . DAC, стр. 50-55. ACM Press, (1999)Origami: A 803-GOp/s/W Convolutional Network Accelerator., и . IEEE Trans. Circuits Syst. Video Techn., 27 (11): 2461-2475 (2017)CAS-CNN: A deep convolutional neural network for image compression artifact suppression., , и . IJCNN, стр. 752-759. IEEE, (2017)Networks on Chips: from research to products., , , , , и . DAC, стр. 300-305. ACM, (2010)A Scalable Near-Memory Architecture for Training Deep Neural Networks on Large In-Memory Datasets., , , и . IEEE Trans. Computers, 68 (4): 484-497 (2019)Minimization of the reconfiguration latency for the mapping of applications on FPGA-based systems., , , , , и . CODES+ISSS, стр. 325-334. ACM, (2009)A wearable EEG-based drowsiness detection system with blink duration and alpha waves analysis., , , и . NER, стр. 251-254. IEEE, (2017)Automatic multiview synthesis - Towards a mobile system on a chip., , , , и . VCIP, стр. 1-4. IEEE, (2015)Synthesis of networks on chips for 3D systems on chips., , , и . ASP-DAC, стр. 242-247. IEEE, (2009)A PULP-based Parallel Power Controller for Future Exascale Systems., , , , , , и . ICECS, стр. 771-774. IEEE, (2019)