From post

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

No persons found for author name Nakatake, Shigetoshi
add a person with the name Nakatake, Shigetoshi
 

Другие публикации лиц с тем же именем

Low Voltage CMOS Current Mode Reference Circuit without Operational Amplifiers., , , и . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 101-A (5): 748-754 (2018)Consistent floorplanning with hierarchical superconstraints., , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 21 (1): 42-49 (2002)Practicality on placement given by optimality of packing.. ISPD, стр. 59-60. ACM, (2013)A Perceptron Circuit with DAC-Based Multiplier for Sensor Analog Front-Ends., , , и . NGCAS, стр. 93-96. IEEE, (2017)On-chip resistance configuration by subthreshold MOSFET-array for ultra weak current sensing., и . APCCAS, стр. 261-264. IEEE, (2019)Regularity-oriented analog placement with diffusion sharing and well island generation., , , , , , и . ASP-DAC, стр. 305-311. IEEE, (2010)Overview of the 2016 CAD contest at ICCAD., , , и . ICCAD, стр. 38. ACM, (2016)The oct-touched tile: a new architecture for shape-based routing., , , и . ACM Great Lakes Symposium on VLSI, стр. 126-129. ACM, (2005)Explicit Expression and Simultaneous Optimization of Placement and Routing for Analog IC Layouts., , , и . ASP-DAC/VLSI Design, стр. 467-472. IEEE Computer Society, (2002)A comparator energy model considering shallow trench isolation stress by geometric programming., , , , и . ISQED, стр. 585-590. IEEE, (2013)