( en | de | ru )

 

Disambiguation of "Kapur, Rohit"

Author of the publication

copydeleteadd this publication to your clipboard
Enhancing test efficiency for delay fault testing using multiple-clocked schemes.

, , , , , , and . DAC, page 371-374. ACM, (2002)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Tina Kapur

Rohit Sinha

Aphrodite Kapurniotu

Malak Basheshar Kapur

Rohit Gupta

 

Other publications of authors with the same name

Security vs. Test Quality: Are they mutually exclusive?. ITC, page 1414. IEEE Computer Society, (2004)Heuristics to Compute Variable Orderings for Efficient Manipulation of Ordered Binary Decision Diagrams., , , and . DAC, page 417-420. ACM, (1991)Scalable Adaptive Scan (SAS)., , and . DATE, page 1476-1481. IEEE, (2009)Iddq Testing for High Performance CMOS - The Next Ten Years., , , , and . ED&TC, page 578-583. IEEE Computer Society, (1996)OCI: Open Compression Interface., , , , , , , , and . ITC, page 1-4. IEEE Computer Society, (2006)A Metric for Test Set Characterization and Customization Toward Fault Diagnosis., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 32 (11): 1824-1828 (2013)System Test and Reliability: Techniques for Avoiding Failure (Guest Editors' Introduction)., and . Computer, 29 (11): 28-30 (1996)Multimode Illinois Scan Architecture for Test Application Time and Test Data Volume Reduction., , and . VTS, page 84-92. IEEE Computer Society, (2007)Fundamentals of timing information for test: How simple can we get?, , and . ITC, page 1-7. IEEE Computer Society, (2007)Integrating DFT in the Physical Synthesis Flow., , , , and . ITC, page 788-795. IEEE Computer Society, (2002)