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CNTFET Modeling and Reconfigurable Logic-Circuit Design., , , , , , , , , and 2 other author(s). IEEE Trans. Circuits Syst. I Regul. Pap., 54-I (11): 2365-2379 (2007)Exploiting Approximate Computing for Efficient and Reliable Convolutional Neural Networks., , and . ISVLSI, page 326. IEEE, (2022)Cross Layer Design for the Predictive Assessment of Technology-Enabled Architectures., , , , , , , , , and . DATE, page 1-10. IEEE, (2023)Dependability of Alternative Computing Paradigms for Machine Learning: hype or hope?, , , , , , , and . DDECS, page 7-13. IEEE, (2022)A Heuristic Exploration of Retraining-free Weight-Sharing for CNN Compression., , , and . ASP-DAC, page 134-139. IEEE, (2022)Guest Editorial: Emerging Technologies and Architectures for Manycore Computing Part 1: Hardware Techniques., , and . IEEE Trans. Multi Scale Comput. Syst., 4 (2): 97-98 (2018)Energy efficient on-chip optical broadcast with partial-absorption photodiodes., , , , , , , and . NEWCAS, page 198-202. IEEE, (2022)Mapping method of reconfigurable cell matrices based on nanoscale devices using inter-stage fixed interconnection scheme., , , , and . ICECS, page 888-891. IEEE, (2009)Logic cells and interconnect strategies for nanoscale reconfigurable computing fabrics., , , , , , and . ICECS, page 66-69. IEEE, (2010)Multilevel Modeling Methodology for Reconfigurable Computing Systems Based on Silicon Photonics., , , , and . ISVLSI, page 561-566. IEEE Computer Society, (2015)