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iDocChip - A Configurable Hardware Architecture for Historical Document Image Processing: Text Line Extraction., , , , and . ReConFig, page 1-8. IEEE, (2019)Efficient hardware accleration of recurrent neural networks = Effiziente Hardwarebeschleunigung rekurrenter neuronaler Netze.. Kaiserslautern University of Technology, Germany, (2022)When Massive GPU Parallelism Ain't Enough: A Novel Hardware Architecture of 2D-LSTM Neural Network., and . FPGA, page 111-121. ACM, (2020)Embedded Face Recognition for Personalized Services in the Assistive Robotics., , , , , , and . PKDD/ECML Workshops (1), volume 1524 of Communications in Computer and Information Science, page 339-350. Springer, (2021)iDocChip: A Configurable Hardware Accelerator for an End-to-End Historical Document Image Processing., , , , , and . J. Imaging, 7 (9): 175 (2021)HALF: Holistic Auto Machine Learning for FPGAs., , , , , and . FPL, page 363-368. IEEE, (2021)An In-DRAM Neural Network Processing Engine., , , , , , and . ISCAS, page 1-5. IEEE, (2019)Real-Time Energy Efficient Hand Pose Estimation: A Case Study., , , , , , , and . Sensors, 20 (10): 2828 (2020)