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A Hybrid Performance Prediction Approach for Fully-Connected Artificial Neural Networks on Multi-core Platforms.

, , , , , and . SAMOS, volume 13511 of Lecture Notes in Computer Science, page 250-263. Springer, (2022)

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Exploring RTOS issues with a high-level model of a reconfigurable SoC platform., , , , and . ReCoSoC, page 71-78. Univ. Montpellier II, (2005)Fault-aware configurable logic block for reliable reconfigurable FPGAs., , and . ISCAS, page 2732-2735. IEEE, (2015)An energy-efficient ternary interconnection link for asynchronous systems., , , and . ISCAS, IEEE, (2006)Efficient dynamic reconfiguration for multi-context embedded FPGA., , and . SBCCI, page 210-215. ACM, (2008)Towards Malicious Exploitation of Energy Management Mechanisms., , and . DATE, page 1043-1048. IEEE, (2020)Gradient - An adaptive fault-tolerant routing algorithm for 2D mesh Network-on-Chips., and . DASIP, page 1-8. IEEE, (2012)Evaluation of Fault-Mitigation Schemes for Fault-Tolerant Dynamic MPSoC., , and . FPL, page 159-162. IEEE Computer Society, (2010)A Neural Network Model for Real-Time Scheduling on Heterogeneous SoC Architectures., , and . IJCNN, page 102-107. IEEE, (2007)High-Level Reliability Evaluation of Reconfiguration-Based Fault Tolerance Techniques., , , , , and . IPDPS Workshops, page 202-205. IEEE Computer Society, (2018)Clear Stream towards Dynamically Reconfigurable Systems on Chip., , , and . ReCoSoC, page 98-104. Univ. Montpellier II, (2006)