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On-chip process variation-tracking through an all-digital monitoring architecture., , , , и . IET Circuits Devices Syst., 6 (5): 366-373 (2012)Power optimization of core-based systems by address bus encoding., , , , и . IEEE Trans. Very Large Scale Integr. Syst., 6 (4): 554-562 (1998)Stream synthesis for efficient power simulation based on spectral transforms., , , и . IEEE Trans. Very Large Scale Integr. Syst., 9 (3): 417-426 (2001)miREE: miRNA Recognition Elements Ensemble., , , и . BMC Bioinform., (2011)Acceleration of coarse grain molecular dynamics on GPU architectures., , , , и . J. Comput. Chem., 34 (10): 803-818 (2013)Testing Core-Based Systems: A Symbolic Methodology., , , , и . IEEE Des. Test Comput., 14 (4): 69-77 (1997)A Multi-Processing Systems-on-Chip Native Simulation Framework for Power and Thermal-Aware Design., , , , , , , и . J. Low Power Electron., 7 (1): 2-16 (2011)Energy-Efficient Value Based Selective Refresh for Embedded DRAMS., , , и . J. Low Power Electron., 2 (1): 70-79 (2006)Beyond Ideal DVFS Through Ultra-Fine Grain Vdd-Hopping., , , , и . VLSI-SoC (Selected Papers), том 508 из IFIP Advances in Information and Communication Technology, стр. 152-172. Springer, (2016)Algebraic Decision Diagrams and Their Applications., , , , , , и . Formal Methods Syst. Des., 10 (2/3): 171-206 (1997)