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High-Level Design of an Asynchronous Packet-Routing Chip., , , , and . Designing Correct Circuits, volume A-5 of IFIP Transactions, page 261-274. North-Holland, (1992)Low-latency asynchronous FIFO buffers., , , and . ASYNC, page 24-31. IEEE Computer Society, (1995)CMOS design of the tree arbiter element., and . IEEE Trans. Very Large Scale Integr. Syst., 4 (4): 472-476 (1996)Communications in concurrent systems - programming language primitives and interconnection networks.. University of Southampton, UK, (1992)British Library, EThOS.