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EGRA: A Coarse Grained Reconfigurable Architectural Template., , and . IEEE Trans. Very Large Scale Integr. Syst., 19 (6): 1062-1074 (2011)An Inexact Ultra-low Power Bio-signal Processing Architecture With Lightweight Error Recovery., , , , , and . ACM Trans. Embed. Comput. Syst., 16 (5s): 159:1-159:19 (2017)i-DPs CGRA: An Interleaved-Datapaths Reconfigurable Accelerator for Embedded Bio-Signal Processing., , , , , and . IEEE Embed. Syst. Lett., 11 (2): 50-53 (2019)Live demonstration: ECG sensor interface in a low power SoC for wireless portable ECG monitoring., , , , , , and . BioCAS, page 187. IEEE, (2014)Full System Exploration of On-Chip Wireless Communication on Many-Core Architectures., , , , , and . LASCAS, page 1-4. IEEE, (2022)System-Level Exploration of In-Package Wireless Communication for Multi-Chiplet Platforms., , , , , , and . ASP-DAC, page 561-566. ACM, (2023)INCLASS: Incremental Classification Strategy for Self-Aware Epileptic Seizure Detection., , , , , , and . DATE, page 1449-1454. IEEE, (2022)Lattice-Traversing Design Space Exploration for High Level Synthesis., , and . ICCD, page 210-217. IEEE Computer Society, (2018)Slack-aware scheduling on Coarse Grained Reconfigurable Arrays., , , and . DATE, page 1513-1516. IEEE, (2011)Judiciously Spreading Approximation Among Arithmetic Components with Top-Down Inexact Hardware Design., , and . ARC, volume 12083 of Lecture Notes in Computer Science, page 14-29. Springer, (2020)