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Disambiguation of "Ghaffari, Fakhreddine"

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Dynamic Application Model for Scheduling with Uncertainty on Reconfigurable Architectures.

, , , and . Int. J. Reconfigurable Comput., (2011)

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Lotfali Ghaffari

Ataolah Ghaffari

Amir Ghaffari

Ardeschir Ghaffari

Amir Ghaffari

 

Other publications of authors with the same name

Probabilistic model of AFDX frames reception for end system backlog assessment., , , , , and . SIES, page 1-6. IEEE, (2017)Reliability Enhancement for Multi-level Cell NAND Flash Memory Using Error Asymmetry., , , and . APCC, page 502-506. IEEE, (2019)A Probabilistic Parallel Bit-Flipping Decoder for Low-Density Parity-Check Codes., , , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 66-I (1): 403-416 (2019)Reliability assessment of backward error recovery for SRAM-based FPGAs., , , and . IDT, page 248-252. IEEE, (2014)Error rate estimation of a design implemented in an FPGA based on the operating conditions., , , and . EWDTS, page 1-7. IEEE Computer Society, (2017)Multi-Mode Low-Latency Software-Defined Error Correction for Data Centers., , , and . ICCCN, page 1-8. IEEE, (2017)Dynamic and On-Line Design Space Exploration for Reconfigurable Architectures., , , and . Trans. High Perform. Embed. Archit. Compil., (2007)Noise-aided gradient descent bit-flipping decoders approaching maximum likelihood decoding., , , , , and . ISTC, page 300-304. IEEE, (2016)Dynamic Application Model for Scheduling with Uncertainty on Reconfigurable Architectures., , , and . Int. J. Reconfigurable Comput., (2011)Design of High-Performance and Area-Efficient Decoder for 5G LDPC Codes., , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 68 (2): 879-891 (2021)