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Exploring memory controller configurations for many-core systems with 3D stacked DRAMs., , , и . ISQED, стр. 565-570. IEEE, (2015)Crosstalk-Aware Energy Efficient Encoding for Instruction Bus through Code Compression., и . SoCC, стр. 193-196. IEEE, (2006)Leakage Optimized DECAP Design for FPGAs., , , , и . APCCAS, стр. 960-963. IEEE, (2006)Reliability-aware Co-synthesis for Embedded Systems., , , , и . VLSI Signal Processing, 49 (1): 87-99 (2007)Augmenting Platform-Based Design with Synthesis Tools., , и . Journal of Circuits, Systems, and Computers, 12 (2): 125-142 (2003)Discriminative Reverse Sparse Tracking via Weighted Multitask Learning., , , , и . IEEE Trans. Circuits Syst. Video Techn., 27 (5): 1031-1042 (2017)Reliability-Centric High-Level Synthesis, , , , и . CoRR, (2007)Leakage-Aware Interconnect for On-Chip Network, , , и . CoRR, (2007)Effect of Power Optimizations on Soft Error Rate., , , , и . VLSI-SoC (Selected Papers), том 200 из IFIP, стр. 1-20. Springer, (2003)Nonfullerene Polymer Solar Cells Based on a Main-Chain Twisted Low-Bandgap Acceptor with Power Conversion Efficiency of 13.2\%, , , , , , , , , и 1 other автор(ы). ACS Energy Letters, 3 (7): 1499--1507 (мая 2018)