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Embedded 1-Mb ReRAM-Based Computing-in- Memory Macro With Multibit Input and Weight for CNN-Based AI Edge Processors.

, , , , , , , , , , , , , , , , , , , and . IEEE J. Solid State Circuits, 55 (1): 203-215 (2020)

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Plantwide optimization coupled with column sequencing and stacking using a process simulator automation server., , , and . Comput. Chem. Eng., (2021)A Reconfigurable RRAM Physically Unclonable Function Utilizing Post-Process Randomness Source With <6×10-6 Native Bit Error Rate., , , , , , , , , and 3 other author(s). ISSCC, page 402-404. IEEE, (2019)Indoor Navigation Based on a Gait Recognition and Counting Scheme., , , , , , , and . ICS, volume 1013 of Communications in Computer and Information Science, page 406-414. Springer, (2018)A 1Mb Multibit ReRAM Computing-In-Memory Macro with 14.6ns Parallel MAC Computing Time for CNN Based AI Edge Processors., , , , , , , , , and 12 other author(s). ISSCC, page 388-390. IEEE, (2019)A Highly Reliable RRAM Physically Unclonable Function Utilizing Post-Process Randomness Source., , , , , , , , , and 2 other author(s). IEEE J. Solid State Circuits, 56 (5): 1641-1650 (2021)A 65-nm ReRAM-Enabled Nonvolatile Processor With Time-Space Domain Adaption and Self-Write-Termination Achieving > 4× Faster Clock Frequency and > 6× Higher Restore Speed., , , , , , , , , and 7 other author(s). IEEE J. Solid State Circuits, 52 (10): 2769-2785 (2017)Embedded 1-Mb ReRAM-Based Computing-in- Memory Macro With Multibit Input and Weight for CNN-Based AI Edge Processors., , , , , , , , , and 10 other author(s). IEEE J. Solid State Circuits, 55 (1): 203-215 (2020)