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Embedded 1-Mb ReRAM-Based Computing-in- Memory Macro With Multibit Input and Weight for CNN-Based AI Edge Processors.

C. Xue, T. Chang, T. Chang, H. Kao, Y. Chiu, C. Lee, Y. King, C. Lin, R. Liu, C. Hsieh, K. Tang, W. Chen, M. Chang, J. Liu, J. Li, W. Lin, W. Lin, J. Wang, W. Wei, and T. Huang. IEEE J. Solid State Circuits, 55 (1): 203-215 (2020)

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Fan Chen Meng

Meng-Chang Liu

Meng Meng

Meng Meng Liang

Meng Zhang

Methods and implementations of road-network matchingM. Zhang. TU München, (2009)

Other publications of authors with the same name

A 65nm 1Mb nonvolatile computing-in-memory ReRAM macro with sub-16ns multiply-and-accumulate for binary DNN AI edge processors.W. Chen, K. Li, W. Lin, K. Hsu, P. Li, C. Yang, C. Xue, E. Yang, Y. Chen, Y. Chang and 7 other author(s). ISSCC, page 494-496. IEEE, (2018)A 1Mb Multibit ReRAM Computing-In-Memory Macro with 14.6ns Parallel MAC Computing Time for CNN Based AI Edge Processors.C. Xue, W. Chen, J. Liu, J. Li, W. Lin, W. Lin, J. Wang, W. Wei, T. Chang, T. Chang and 12 other author(s). ISSCC, page 388-390. IEEE, (2019)A Fully Integrated Nose-on-a-Chip for Rapid Diagnosis of Ventilator-Associated Pneumonia.S. Chiu, J. Wang, K. Chang, T. Chang, C. Wang, C. Chang, C. Tang, C. Chen, C. Shih, H. Kuo and 10 other author(s). IEEE Trans. Biomed. Circuits Syst., 8 (6): 765-778 (2014)Resistive Memory-Based In-Memory Computing: From Device and Large-Scale Integration System Perspectives.B. Yan, B. Li, X. Qiao, C. Xue, M. Chang, Y. Chen, and H. Li. Adv. Intell. Syst., 1 (7): 1900068 (2019)Considerations Of Integrating Computing-In-Memory And Processing-In-Sensor Into Convolutional Neural Network Accelerators For Low-Power Edge Devices.K. Tang, W. Wei, Z. Yeh, T. Hsu, Y. Chiu, C. Xue, Y. Kuo, T. Wen, M. Ho, C. Lo and 3 other author(s). VLSI Circuits, page 166-. IEEE, (2019)A Dual-Split 6T SRAM-Based Computing-in-Memory Unit-Macro With Fully Parallel Product-Sum Operation for Binarized DNN Edge Processors.X. Si, W. Khwa, J. Chen, J. Li, X. Sun, R. Liu, S. Yu, H. Yamauchi, Q. Li, and M. Chang. IEEE Trans. Circuits Syst. I Regul. Pap., 66-I (11): 4172-4185 (2019)17.5 A 3T1R nonvolatile TCAM using MLC ReRAM with Sub-1ns search time.M. Chang, C. Lin, A. Lee, C. Kuo, G. Yang, H. Tsai, T. Chen, S. Sheu, P. Tseng, H. Lee and 1 other author(s). ISSCC, page 1-3. IEEE, (2015)5.9 A 0.8V Multimode Vision Sensor for Motion and Saliency Detection with Ping-Pong PWM Pixel.T. Hsu, Y. Chen, J. Wu, W. Ting, C. Wang, C. Yeh, S. Sie, Y. Chen, R. Liu, C. Lo and 3 other author(s). ISSCC, page 110-112. IEEE, (2020)13.4 A 22nm 1Mb 1024b-Read and Near-Memory-Computing Dual-Mode STT-MRAM Macro with 42.6GB/s Read Bandwidth for Security-Aware Mobile Devices.T. Chang, Y. Chiu, C. Lee, J. Hung, K. Chang, C. Xue, S. Wu, H. Kao, P. Chen, H. Huang and 2 other author(s). ISSCC, page 224-226. IEEE, (2020)14.3 A 65nm Computing-in-Memory-Based CNN Processor with 2.9-to-35.8TOPS/W System Energy Efficiency Using Dynamic-Sparsity Performance-Scaling Architecture and Energy-Efficient Inter/Intra-Macro Data Reuse.J. Yue, Z. Yuan, X. Feng, Y. He, Z. Zhang, X. Si, R. Liu, M. Chang, X. Li, H. Yang and 1 other author(s). ISSCC, page 234-236. IEEE, (2020)

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Disambiguation of "Chang, Meng-Fan"

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Embedded 1-Mb ReRAM-Based Computing-in- Memory Macro With Multibit Input and Weight for CNN-Based AI Edge Processors.

Please choose a person to relate this publication to

Fan Chen Meng

Meng-Chang Liu

Meng Meng

Meng Meng Liang

Meng Zhang

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Chang, Meng-Fan"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Embedded 1-Mb ReRAM-Based Computing-in- Memory Macro With Multibit Input and Weight for CNN-Based AI Edge Processors.

Please choose a person to relate this publication to

Fan Chen Meng

Meng-Chang Liu

Meng Meng

Meng Meng Liang

Meng Zhang

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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URL
DOI
BibTeX
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APA
Chicago
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Embedded 1-Mb ReRAM-Based Computing-in- Memory Macro With Multibit Input and Weight for CNN-Based AI Edge Processors.