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A 192-Gb 12-High 896-GB/s HBM3 DRAM with a TSV Auto-Calibration Scheme and Machine-Learning-Based Layout Optimization.

M. Park, H. Cho, T. Yun, S. Byeon, Y. Koo, S. Yoon, D. Lee, S. Choi, J. Park, J. Lee, K. Cho, J. Moon, B. Yoon, Y. Park, S. Oh, C. Lee, T. Kim, S. Lee, H. Kim, Y. Ju, S. Lim, S. Baek, K. Lee, S. Lee, W. We, S. Kim, Y. Choi, S. Lee, S. Yang, G. Lee, I. Kim, Y. Jeon, J. Park, J. Yun, C. Park, S. Kim, S. Kim, D. Lee, S. Oh, T. Hwang, J. Shin, Y. Lee, H. Kim, J. Lee, Y. Hur, S. Lee, J. Jang, J. Chun, and J. Cho. ISSCC, page 444-446. IEEE, (2022)

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Jinhyung Park

Xavier Lee Lee

Bongsoo Lee

The role of negative regulators in coordination of the Myxococcus xanthus developmental programB. Lee. Uni Marburg, (2009)

Min-Hi Lee

Induction and regulation of antiviral defence mechanisms through intracytoplasmic sensorsM. Lee. HU Berlin, (2009)

Clara Lee

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A 192-Gb 12-High 896-GB/s HBM3 DRAM with a TSV Auto-Calibration Scheme and Machine-Learning-Based Layout Optimization.M. Park, H. Cho, T. Yun, S. Byeon, Y. Koo, S. Yoon, D. Lee, S. Choi, J. Park, J. Lee and 39 other author(s). ISSCC, page 444-446. IEEE, (2022)Discrete Neural ProcessesA. Pakman, Y. Wang, C. Mitelut, J. Lee, and L. Paninski. (2018)cite arxiv:1901.00409.A theoretical analysis of phase shift in pulse injection-locked oscillators.J. Lee, S. Kim, M. Choo, S. Cho, H. Ko, and D. Jeong. ISCAS, page 1662-1665. IEEE, (2016)Job Accessibility as a Lens for Understanding the Urban Structure of Colonial Cities: A Digital Humanities Study of the Colonial Seoul in the 1930s Using GIS.Y. Kim, J. Kim, H. Ha, N. Nakajima, and J. Lee. ISPRS Int. J. Geo Inf., 11 (12): 614 (December 2022)A PVT Variation-Robust All-Digital Injection-Locked Clock Multiplier With Real-Time Offset Tracking Using Time-Division Dual Calibration.M. Choo, S. Kim, H. Ko, S. Cho, K. Park, J. Lee, S. Shin, H. Chi, and D. Jeong. IEEE J. Solid State Circuits, 56 (8): 2525-2538 (2021)A 0.1pJ/b/dB 1.62-to-10.8Gb/s Video Interface Receiver with Fully Adaptive Equalization Using Un-Even Data Level.J. Lee, K. Lee, H. Kim, B. Kim, K. Park, and D. Jeong. VLSI Circuits, page 198-. IEEE, (2019)29.7 A 2.5GHz injection-locked ADPLL with 197fsrms integrated jitter and -65dBc reference spur using time-division dual calibration.S. Kim, H. Ko, S. Cho, J. Lee, S. Shin, M. Choo, H. Chi, and D. Jeong. ISSCC, page 494-495. IEEE, (2017)A 10 Gb/s hybrid PLL-based forwarded clock receiver in 65-nm CMOS.K. Park, W. Bae, H. Ju, J. Lee, G. Jeong, Y. Kim, and D. Jeong. ISCAS, page 2389-2392. IEEE, (2015)Predicting urban flooding susceptibility of public transit systems using machine learning approaches: a case study of the largest city in Canada.N. Ahmed, and J. Lee. ARIC@SIGSPATIAL, page 32-41. ACM, (2021)A 55.1 mW 1.62-to-8.1 Gb/s Video Interface Receiver Generating up to 680 MHz Stream Clock Over 20 dB Loss Channel.K. Park, J. Lee, K. Lee, M. Choo, S. Jang, S. Chu, S. Kim, and D. Jeong. IEEE Trans. Circuits Syst. II Express Briefs, 64-II (12): 1432-1436 (2017)

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Disambiguation of "Lee, Jinhyung"

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A 192-Gb 12-High 896-GB/s HBM3 DRAM with a TSV Auto-Calibration Scheme and Machine-Learning-Based Layout Optimization.

Please choose a person to relate this publication to

Jinhyung Park

Xavier Lee Lee

Bongsoo Lee

Min-Hi Lee

Clara Lee

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Lee, Jinhyung"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A 192-Gb 12-High 896-GB/s HBM3 DRAM with a TSV Auto-Calibration Scheme and Machine-Learning-Based Layout Optimization.

Please choose a person to relate this publication to

Jinhyung Park

Xavier Lee Lee

Bongsoo Lee

Min-Hi Lee

Clara Lee

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
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APA
Chicago
DIN 1505
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A 192-Gb 12-High 896-GB/s HBM3 DRAM with a TSV Auto-Calibration Scheme and Machine-Learning-Based Layout Optimization.