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Power-aware scheduling with effective task migration for real-time multicore embedded systems.

, , , , и . Concurr. Comput. Pract. Exp., 25 (14): 1987-2001 (2013)

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Christophe Petit

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Antoine Petit

 

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Paired ROBs: A Cost-Effective Reorder Buffer Sharing Strategy for SMT Processors., , , и . Euro-Par, том 5704 из Lecture Notes in Computer Science, стр. 309-320. Springer, (2009)A Sequentially Consistent Multiprocessor Architecture for Out-of-Order Retirement of Instructions., , , , и . IEEE Trans. Parallel Distributed Syst., 23 (8): 1361-1368 (2012)Addressing a workload characterization study to the design of consistency protocols., , , и . J. Supercomput., 38 (1): 49-72 (2006)FOS: a low-power cache organization for multicores., , , и . J. Supercomput., 75 (10): 6542-6573 (2019)Power Reduction In Advanced Embedded IPC Processors., , , , и . Intell. Autom. Soft Comput., 15 (3): 495-507 (2009)Hardware-Based Generation of Independent Subtraces of Instructions in Clustered Processors., , , , и . IEEE Trans. Computers, 62 (5): 944-955 (2013)A research-oriented course on Advanced Multicore Architecture: Contents and active learning methodologies., , , и . J. Parallel Distributed Comput., (2017)A dynamic execution time estimation model to save energy in heterogeneous multicores running periodic tasks., , , , и . Future Gener. Comput. Syst., (2016)Dynamic WCET Estimation for Real-Time Multicore Embedded Systems Supporting DVFS., , , , и . HPCC/CSS/ICESS, стр. 27-33. IEEE, (2014)Out-of-order retirement of instructions in sequentially consistent multiprocessors., , , , и . ICCD, стр. 1-8. IEEE Computer Society, (2010)