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14.8 A 0.009mm2 2.06mW 32-to-2000MHz 2nd-order ΔΣ analogous bang-bang digital PLL with feed-forward delay-locked and phase-locked operations in 14nm FinFET technology.

M. Song, T. Kim, J. Kim, W. Kim, S. Kim, and H. Park. ISSCC, page 1-3. IEEE, (2015)

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Hojin Kee

Sungjune Park

Rosemary Park

Shinja Park

June Park

Other publications of authors with the same name

19.3 A 2.4GHz 1.5mW digital MDLL using pulse-width comparator and double injection technique in 28nm CMOS.H. Kim, Y. Kim, T. Kim, H. Park, and S. Cho. ISSCC, page 328-329. IEEE, (2016)A 0.032mm2 3.1mW synthesized pixel clock generator with 30psrms integrated jitter and 10-to-630MHz DCO tuning range.W. Kim, J. Park, J. Kim, T. Kim, H. Park, and D. Jeong. ISSCC, page 250-251. IEEE, (2013)A 0.015-mm2 Inductorless 32-GHz Clock Generator With Wide Frequency-Tuning Range in 28-nm CMOS Technology.G. Jeong, W. Kim, J. Park, T. Kim, H. Park, and D. Jeong. IEEE Trans. Circuits Syst. II Express Briefs, 64-II (6): 655-659 (2017)Open-Set Face Identification on Few-Shot Gallery by Fine-Tuning.H. Park, J. Park, and A. Teoh. CoRR, (2023)More IOPS for Less: Exploiting Burstable Storage in Public Clouds.H. Park, G. Ganger, and G. Amvrosiadis. HotCloud, USENIX Association, (2020)A 0.026mm2 5.3mW 32-to-2000MHz digital fractional-N phase locked-loop using a phase-interpolating phase-to-digital converter.T. Jang, N. Xing, F. Liu, J. Shin, H. Ryu, J. Kim, T. Kim, J. Park, and H. Park. ISSCC, page 254-255. IEEE, (2013)15.5 A 0.6V 1.17ps PVT-tolerant and synthesizable time-to-digital converter using stochastic phase interpolation with 16× spatial redundancy in 14nm FinFET technology.S. Kim, W. Kim, M. Song, J. Kim, T. Kim, and H. Park. ISSCC, page 1-3. IEEE, (2015)Design of a Digital Home Service Delivery and Management System for OSGi Framework.T. Hwang, H. Park, and J. Chung. APNOMS, volume 4773 of Lecture Notes in Computer Science, page 1-10. Springer, (2007)Understanding open-set recognition by Jacobian norm and inter-class separation.J. Park, H. Park, E. Jeong, and A. Teoh. Pattern Recognit., (January 2024)Verifying start-up failures in coupled ring oscillators in presence of variability using predictive global optimization.T. Kim, D. Song, S. Youn, J. Park, H. Park, and J. Kim. ICCAD, page 486-493. IEEE, (2013)

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Disambiguation of "Park, Hojin"