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Disambiguation of "Horiguchi, Naoto"

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Off-state stress degradation mechanism on advanced p-MOSFETs.

, , , , , , , , and . ICICDT, page 1-4. IEEE, (2015)

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Naoto Kamano

Naoto Matsumura

Tomonaga Horiguchi

 

Other publications of authors with the same name

Off-state stress degradation mechanism on advanced p-MOSFETs., , , , , , , , and . ICICDT, page 1-4. IEEE, (2015)Assessment of SiGe quantum well transistors for DRAM peripheral applications., , , , , , , , , and 1 other author(s). ICICDT, page 1-4. IEEE, (2015)Impact of Al2O3 position on performances and reliability in high-k metal gated DRAM periphery transistors., , , , , , , , , and 8 other author(s). ESSDERC, page 190-193. IEEE, (2013)Relevance of fin dimensions and high-pressure anneals on hot-carrier degradation., , , , , , , , and . IRPS, page 1-6. IEEE, (2020)Origins and implications of increased channel hot carrier variability in nFinFETs., , , , , , , , , and 11 other author(s). IRPS, page 3. IEEE, (2015)Impact of fin shape variability on device performance towards 10nm node., , , , , , , , , and 3 other author(s). ICICDT, page 1-4. IEEE, (2015)Superior reliability and reduced Time-Dependent variability in high-mobility SiGe channel pMOSFETs for VLSI logic applications., , , , , , , , , and 6 other author(s). ICICDT, page 1-4. IEEE, (2012)Scalability comparison between raised- and embedded-SiGe source/drain structures for Si0.55Ge0.45 implant free quantum well pFET., , , , , , , and . Microelectron. Reliab., (2018)High Performance Thermally Resistant FinFETs DRAM Peripheral CMOS FinFETs with VTH Tunability for Future Memories., , , , , , , , , and 12 other author(s). VLSI Technology and Circuits, page 306-307. IEEE, (2022)Integration of a Stacked Contact MOL for Monolithic CFET., , , , , , , , , and 13 other author(s). VLSI Technology and Circuits, page 1-2. IEEE, (2023)