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Disambiguation of "Yin, Hai Bing"

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High throughput VLSI architecture for multiresolution integer motion estimation in high definition AVS video encoder.

, , , , and . VCIP, volume 7744 of SPIE Proceedings, page 77441W. SPIE, (2010)

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Hai-Ping Yin

Richard Bing

Bing Shan

Bing Chen

Bing Wang

 

Other publications of authors with the same name

A Fast Zero-Quantized Percentage Model for Video Coding with RDO Quantization., , and . PCM (3), volume 11166 of Lecture Notes in Computer Science, page 761-771. Springer, (2018)Motion Vector Smoothing for True Motion Estimation., , , , and . ICASSP (2), page 241-244. IEEE, (2006)Lossless image compression algorithm and hardware architecture for bandwidth reduction of external memory., , , and . IET Image Processing, 11 (6): 379-388 (2017)A hardware-efficient architecture for multi-resolution motion estimation using fully reconfigurable processing element array., , , , and . ICME, page 1-6. IEEE Computer Society, (2011)VLSI friendly me search window buffer structure optimization and algorithm verification for high definition H.264/AVS video encoder., , , and . ICME, page 1098-1101. IEEE, (2009)Multiple target performance evaluation model for HD video encoder VLSI architecture design., , and . VCIP, page 1-4. IEEE, (2013)Moving vehicles detection based on adaptive motion histogram., , and . Digit. Signal Process., 20 (3): 793-805 (2010)A perceptual two-pass VBR MPEG-2 video encoder., , and . IEEE Trans. Consumer Electronics, 51 (4): 1237-1247 (2005)A Hardware-Efficient Multi-Resolution Block Matching Algorithm and its VLSI Architecture for High Definition MPEG-Like Video Encoders., , , , , and . IEEE Trans. Circuits Syst. Video Techn., 20 (9): 1242-1254 (2010)Efficient macroblock pipeline structure in high definition AVS video encoder VLSI architecture., , , , and . ISCAS, page 669-672. IEEE, (2010)