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Efficient March Test Procedure for Dynamic Read Destructive Fault Detection in SRAM Memories.

L. Dilillo, P. Girard, S. Pravossoudovitch, A. Virazel, S. Borri, and M. Hage-Hassan. J. Electron. Test., 21 (5): 551-561 (2005)

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Benoît Girard

Pierre Girard

Adrien Girard

Jules Girard

Yann Girard

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Designs of Two Quadruple-Node-Upset Self-Recoverable Latches for Highly Robust Computing in Harsh Radiation Environments.A. Yan, Z. Li, J. Cui, Z. Huang, T. Ni, P. Girard, and X. Wen. IEEE Trans. Aerosp. Electron. Syst., 59 (3): 2885-2897 (June 2023)Delay-Fault Diagnosis by Critical-Path Tracing.P. Girard, C. Landrault, and S. Pravossoudovitch. IEEE Des. Test Comput., 9 (4): 27-32 (1992)From onions to broccoli: generalizing Lewis' counterfactual logic.P. Girard. J. Appl. Non Class. Logics, 17 (2): 213-229 (2007)DOVA PRO: A Dynamic Overwriting Voltage Adjustment Technique for STT-MRAM L1 Cache Considering Dielectric Breakdown Effect.J. Chen, C. Lu, J. Ni, X. Guo, P. Girard, and Y. Cheng. IEEE Trans. Very Large Scale Integr. Syst., 29 (7): 1325-1334 (2021)Nonvolatile Latch Designs With Node-Upset Tolerance and Recovery Using Magnetic Tunnel Junctions and CMOS.A. Yan, L. Wang, J. Cui, Z. Huang, T. Ni, P. Girard, and X. Wen. IEEE Trans. Very Large Scale Integr. Syst., 32 (1): 116-127 (January 2024)Everything Else Being Equal: A Modal Logic for Ceteris Paribus Preferences.J. van Benthem, P. Girard, and O. Roy. J. Philosophical Logic, 38 (1): 83-125 (2009)Design of a Sextuple Cross-Coupled SRAM Cell with Optimized Access Operations for Highly Reliable Terrestrial Applications.A. Yan, Z. Wu, J. Zhou, Y. Hu, Y. Chen, Z. Ying, X. Wen, and P. Girard. ATS, page 55-60. IEEE, (2019)Logical dynamics of belief change in the community.F. Liu, J. Seligman, and P. Girard. Synthese, 191 (11): 2403-2431 (2014)Effect-cause intra-cell diagnosis at transistor level.Z. Sun, A. Bosio, L. Dilillo, P. Girard, A. Todri, A. Virazel, and E. Auvray. ISQED, page 460-467. IEEE, (2013)Structural-Based Power-Aware Assignment of Don't Cares for Peak Power Reduction during Scan Testing.N. Badereddine, P. Girard, S. Pravossoudovitch, C. Landrault, A. Virazel, and H. Wunderlich. VLSI-SoC, page 403-408. IEEE, (2006)

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Disambiguation of "Girard, Patrick"

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Efficient March Test Procedure for Dynamic Read Destructive Fault Detection in SRAM Memories.

Please choose a person to relate this publication to

Benoît Girard

Pierre Girard

Adrien Girard

Jules Girard

Yann Girard

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Girard, Patrick"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Efficient March Test Procedure for Dynamic Read Destructive Fault Detection in SRAM Memories.

Please choose a person to relate this publication to

Benoît Girard

Pierre Girard

Adrien Girard

Jules Girard

Yann Girard

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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Efficient March Test Procedure for Dynamic Read Destructive Fault Detection in SRAM Memories.