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Disambiguation of "Fujita, Masahiro"

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Solving the net matching problem in high-performance chip design.

, , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 15 (8): 902-911 (1996)

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Toko Fujita

Masahiro Noguchi

Buntaro Fujita

Masahiro Ogawa

Masayuki Fujita

 

Other publications of authors with the same name

A 48 MHz 880-nW Standby Power Normally-Off MCU with 1 Clock Full Backup and 4.69-μs Wakeup Featuring 60-nm Crystalline In-Ga-Zn Oxide BEOL-FETs., , , , , , , , , and 1 other author(s). VLSI Circuits, page 48-. IEEE, (2019)An Incremental Automatic Test Pattern Generation Method for Multiple Stuck-at Faults., , and . VTS, page 1-6. IEEE, (2019)Intelligence Dynamics: a concept and preliminary experiments for open-ended learning agents.. Auton. Agents Multi Agent Syst., 19 (3): 248-271 (2009)Subthreshold Operation of CAAC-IGZO FPGA by Overdriving of Programmable Routing Switch and Programmable Power Switch., , , , , , , , , and 2 other author(s). IEEE Trans. Very Large Scale Integr. Syst., 25 (1): 125-138 (2017)High-level optimization of integer multipliers over a finite bit-width with verification capabilities., , , and . MEMOCODE, page 56-65. IEEE, (2009)Development and Testing of Force-Sensing Forceps Using FBG for Bilateral Micro-Operation System., , , , , , , and . IEEE Robotics Autom. Lett., 3 (4): 4281-4288 (2018)An Automatic Method of Mapping I/O Sequences of Chip Execution onto High-level Design for Post-Silicon Debugging., , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 94-A (7): 1519-1529 (2011)Embedded Software Verification Using Symbolic Execution and Uninterpreted Functions., , , , , and . Int. J. Parallel Program., 34 (1): 61-91 (2006)A Methodology to Capture Fine-Grained Internal Visibility During Multisession Silicon Debug., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 28 (4): 1002-1015 (2020)Program slicing for VHDL., , , , , and . Int. J. Softw. Tools Technol. Transf., 4 (1): 125-137 (2002)