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Design and Implementation of the MorphoSys Reconfigurable Computing Processor.

, , , , , , and . VLSI Signal Processing, 24 (2-3): 147-164 (2000)

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Design and Implementation of the MorphoSys Reconfigurable Computing Processor., , , , , , and . VLSI Signal Processing, 24 (2-3): 147-164 (2000)Time Sharing in Hypercube Multiprocessors., and . SPDP, page 354-359. IEEE Computer Society, (1992)The Effect of the Speculation Depth on the Performance of Superscalar Architectures., and . Euro-Par, volume 1300 of Lecture Notes in Computer Science, page 1061-1065. Springer, (1997)The Dynamic Trace Memorization Reuse Technique., , and . IEEE PACT, page 92-99. IEEE Computer Society, (2000)Functionality Distribution on a Superscalar Architecture., , and . Euro-Par, Vol. II, volume 1124 of Lecture Notes in Computer Science, page 773-778. Springer, (1996)MorphoSys: An Integrated Reconfigurable System for Data-Parallel and Computation-Intensive Applications., , , , , and . IEEE Trans. Computers, 49 (5): 465-481 (2000)MorphoSys: A Reconfigurable Processor Trageted to High Performance Image Application., , , , , and . IPPS/SPDP Workshops, volume 1586 of Lecture Notes in Computer Science, page 661-669. Springer, (1999)The MorphoSys Dynamically Reconfigurable System-on-Chip., , , , , , and . Evolvable Hardware, page 152-160. IEEE Computer Society, (1999)MorphoSys: case study of a reconfigurable computing system targeting multimedia applications., , , , , , and . DAC, page 573-578. ACM, (2000)The MorphoSys Parallel Reconfigurable System., , , , , and . Euro-Par, volume 1685 of Lecture Notes in Computer Science, page 727-734. Springer, (1999)