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Design and Implementation of the MorphoSys Reconfigurable Computing Processor.

, , , , , , and . VLSI Signal Processing, 24 (2-3): 147-164 (2000)

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Design and Implementation of the MorphoSys Reconfigurable Computing Processor., , , , , , and . VLSI Signal Processing, 24 (2-3): 147-164 (2000)State Model Approach for Analog Fault Modeling., , , and . LATW, page 86-88. IEEE, (2002)Testing a PWM circuit using functional fault models and compact test vectors for operational amplifiers., , and . Asian Test Symposium, page 96-. IEEE Computer Society, (2000)A BIST Scheme for Asynchronous Logic., , and . Asian Test Symposium, page 27-32. IEEE Computer Society, (1998)STANNIS: Low-Power Acceleration of Deep Neural Network Training Using Computational Storage., , , , , and . CoRR, (2020)System on a Chip for Petroleum Pipeline Inspection., , and . SBCCI, page 331-336. IEEE Computer Society, (2002)Fault Models and Compact Test Vectors for MOS OpAmp circuits., , , and . SBCCI, page 289-294. IEEE Computer Society, (2000)Stannis: Low-Power Acceleration of DNN Training Using Computational Storage Devices., , , , , and . DAC, page 1-6. IEEE, (2020)CompStor: An In-storage Computation Platform for Scalable Distributed Processing., , , and . IPDPS Workshops, page 1260-1267. IEEE Computer Society, (2018)The MorphoSys Dynamically Reconfigurable System-on-Chip., , , , , , and . Evolvable Hardware, page 152-160. IEEE Computer Society, (1999)