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The Forward Slice Core: A High-Performance, Yet Low-Complexity Microarchitecture.

, , , и . ACM Trans. Archit. Code Optim., 19 (2): 17:1-17:25 (2022)

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Lieven Pool

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SWAP: Parallelization through Algorithm Substitution., , , , , и . IEEE Micro, 32 (4): 54-67 (2012)Hot Chips: The Annual Feast of Riches.. IEEE Micro, 36 (2): 4 (2016)Comparing Multiported Cache Schemes., , и . PDPTA, стр. 1179-1185. CSREA Press, (2003)From Cool Chips to Hot Interconnects.. IEEE Micro, 37 (5): 4-5 (2017)Hot Chips 29.. IEEE Micro, 38 (2): 6-7 (2018)Optimizing Soft Error Reliability Through Scheduling on Heterogeneous Multicore Processors., , и . IEEE Trans. Computers, 67 (6): 830-846 (2018)Automated just-in-time compiler tuning., , и . CGO, стр. 62-72. ACM, (2010)Automated hardware-independent scenario identification., и . DAC, стр. 954-959. ACM, (2008)Finding Stress Patterns in Microprocessor Workloads., и . HiPEAC, том 5409 из Lecture Notes in Computer Science, стр. 153-167. Springer, (2009)Evaluating Application Vulnerability to Soft Errors in Multi-level Cache Hierarchy., , , и . Euro-Par Workshops (2), том 7156 из Lecture Notes in Computer Science, стр. 272-281. Springer, (2011)