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Methodologies and Toolflows for the Predictable Design of Reliable and Low-Power NoCs.

. University of Ferrara, Italy, (2014)

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Alberto Moreira

Alberto Coda

Alberto Fierro

Alberto Rorai

Alberto Calabrò

 

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A transition-signaling bundled data NoC switch architecture for cost-effective GALS multicore systems., , и . DATE, стр. 332-337. EDA Consortium San Jose, CA, USA / ACM DL, (2013)A vertically integrated and interoperable multi-vendor synthesis flow for predictable noc design in nanoscale technologies., , , , , и . ASP-DAC, стр. 337-342. IEEE, (2014)Towards compelling cases for the viability of silicon-nanophotonic technology in future manycore systems., , , , , , и . NOCS, стр. 170-171. IEEE, (2014)A feature-rich NoC switch with cross-feature optimizations for the next generation of reliable and reconfigurable embedded systems., , , и . INA-OCMC@HiPEAC, стр. 2:1-2:4. ACM, (2014)System-level infrastructure for boot-time testing and configuration of networks-on-chip with programmable routing logic., , , и . VLSI-SoC, стр. 308-313. IEEE, (2011)Crossbar replication vs. sharing for virtual channel flow control in asynchronous NoCs: A comparative study., , , и . VLSI-SoC, стр. 1-6. IEEE, (2014)Methodologies and Toolflows for the Predictable Design of Reliable and Low-Power NoCs.. University of Ferrara, Italy, (2014)Power efficiency of switch architecture extensions for fault tolerant NoC design., , , и . IGCC, стр. 1-6. IEEE Computer Society, (2012)Assessing the energy break-even point between an optical NoC architecture and an aggressive electronic baseline., , , , , и . DATE, стр. 1-6. European Design and Automation Association, (2014)Non-intrusive trace & debug noc architecture with accurate timestamping for GALS SoCs., , , , и . CODES+ISSS, стр. 181-186. ACM, (2012)