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Disambiguation of "Horowitz, Mark"

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Compiling Algorithms for Heterogeneous Systems

, , , and . Synthesis Lectures on Computer Architecture Morgan & Claypool Publishers, (2018)

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Flavio Horowitz

Alexander Horowitz

Pinchas Horowitz

Pinchas Horowitz

Charles Horowitz

 

Other publications of authors with the same name

A 0.4-4-Gb/s CMOS quad transceiver cell using on-chip regulated dual-loop PLLs., , , , , , , and . IEEE J. Solid State Circuits, 38 (5): 747-754 (2003)A 700-Mb/s/pin CMOS signaling interface using current integrating receivers., and . IEEE J. Solid State Circuits, 32 (5): 681-690 (1997)Towards an explanatory and computational theory of scientific discovery, , , , , and . CoRR, (2009)Rigel: flexible multi-rate image processing hardware., , , , , and . ACM Trans. Graph., 35 (4): 85:1-85:11 (2016)An Analytical Cache Model., , and . ACM Trans. Comput. Syst., 7 (2): 184-215 (1989)Tiny Tera: a packet switch core., , , , and . IEEE Micro, 17 (1): 26-33 (1997)Unified Buffer: Compiling Image Processing and Machine Learning Applications to Push-Memory Accelerators., , , , , , , and . ACM Trans. Archit. Code Optim., 20 (2): 26:1-26:26 (June 2023)AHA: An Agile Approach to the Design of Coarse-Grained Reconfigurable Accelerators and Compilers., , , , , , , , , and 23 other author(s). ACM Trans. Embed. Comput. Syst., 22 (2): 35:1-35:34 (March 2023)The Sparse Abstract Machine., , , , , , , and . CoRR, (2022)A high-speed, low-power 3D-SRAM architecture., , and . CICC, page 201-204. IEEE, (2008)