From post

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

 

Другие публикации лиц с тем же именем

Charge-Recycling based Redundant Write Prevention Technique for Low Power SOT-MRAM., , и . ISCAS, стр. 1-4. IEEE, (2018)Charge-Recycling-Based Redundant Write Prevention Technique for Low-Power SOT-MRAM., и . IEEE Trans. Very Large Scale Integr. Syst., 27 (6): 1343-1352 (2019)Embedded DRAM-Based Memory Customization for Low-Cost FFT Processor Design., , и . IEEE Trans. Very Large Scale Integr. Syst., 25 (12): 3484-3494 (2017)Stochastic SOT Device Based SNN Architecture for On-Chip Unsupervised STDP Learning., , , , , , и . IEEE Trans. Computers, 71 (9): 2022-2035 (2022)A Refresh-Less eDRAM Macro With Embedded Voltage Reference and Selective Read for an Area and Power Efficient Viterbi Decoder., , и . IEEE J. Solid State Circuits, 50 (10): 2451-2462 (2015)A 14nm 128Mb Embedded MRAM Macro achieved the Best Figure-Of-Merit with 80MHz Read operation and 18.1Mb/mm² implementation at 0.64V., , , , , , , , , и 2 other автор(ы). VLSI Technology and Circuits, стр. 1-2. IEEE, (2023)Spin Orbit Torque Device based Stochastic Multi-bit Synapses for On-chip STDP Learning., , и . ISLPED, стр. 21:1-21:6. ACM, (2018)A DRAM based physical unclonable function capable of generating >1032 Challenge Response Pairs per 1Kbit array for secure chip authentication., , , , , , и . CICC, стр. 1-4. IEEE, (2017)