From post

A Slew Rate Variation Compensated 2× VDD I/O Buffer Using Deterministic P/N-PVT Variation Detection Method.

, , , , и . IEEE Trans. Circuits Syst. II Express Briefs, 66-II (1): 116-120 (2019)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

 

Другие публикации лиц с тем же именем

74-dBc SFDR 71-MHz Four-Stage Pipeline ROM-Less DDFS Using Factorized Second-Order Parabolic Equations., , , и . IEEE Trans. Very Large Scale Integr. Syst., 27 (10): 2464-2468 (2019)Analysis of Calibrated On-Chip Temperature Sensor With Process Compensation for HV Chips., , и . IEEE Trans. Circuits Syst. II Express Briefs, 62-II (3): 217-221 (2015)Highly Sensitive FPW-Based Microsystem for Rapid Detection of Tetrahydrocannabinol in Human Urine., , , , , и . Sensors, 17 (12): 2760 (2017)500 MHz 90 nm CMOS 2 \(\) VDD Digital Output Buffer Immunity to Process and Voltage Variations., , , и . CSSP, 38 (2): 556-568 (2019)High-Accuracy Impedance Read-out Circuit for BIA-type Biomedical Sensors., , , , , , и . Circuits Syst. Signal Process., 40 (9): 4187-4195 (2021)A Slew Rate Variation Compensated 2× VDD I/O Buffer Using Deterministic P/N-PVT Variation Detection Method., , , , и . IEEE Trans. Circuits Syst. II Express Briefs, 66-II (1): 116-120 (2019)A pipeline ROM-less DDFS using equal-division interpolation., , и . ISOCC, стр. 19-20. IEEE, (2017)Sampling Rate Enhancement for SAR-ADCs Using Adaptive Reset Approach for FOG Systems., , , и . ASICON, стр. 1-4. IEEE, (2019)A method of leakage reduction and slew-rate adjustment in 2×VDD output buffer for 28 nm CMOS technology and above., , и . ICICDT, стр. 1-4. IEEE, (2016)SIP-Based Cross-Domain Proxy Handoff for Mobile Streaming Services., , , , и . ISPAN, стр. 4-9. IEEE Computer Society, (2008)