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Disambiguation of "Pal, Dipankar"

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Current Conveyor-Based Square/Triangular Waveform Generators With Improved Linearity.

, , , , and . IEEE Trans. Instrum. Meas., 58 (7): 2174-2180 (2009)

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Dipankar Mandal

Michael Pal

Andrea Pál

Aprameyo Pal

Pal Dragos

 

Other publications of authors with the same name

A Low Power 8-Bit Asynchronous SAR ADC Design Using Charge Scaling DAC., , , and . ISED, page 219-223. IEEE Computer Society, (2014)CCII+ based dual square-and-triangular waveform generator., and . ECAI, page 1-6. IEEE, (2017)Novel All-Pass Section for High-Performance Signal Processing Using CMOS DCCII., , , and . TENCON, page 7-10. IEEE, (2021)A wide-input linear range sub-threshold transconductor for sub-Hz filtering., , and . ISCAS, page 1567-1570. IEEE, (2010)Current Conveyor-Based Square/Triangular Waveform Generators With Improved Linearity., , , , and . IEEE Trans. Instrum. Meas., 58 (7): 2174-2180 (2009)Strong-ARM Dynamic Latch Comparators: Design and Analyses on CAD Platform., and . CoRR, (2024)A low-voltage, low-power, high-linearity cmos four-quadrant analog multiplier., , and . ECCTD, page 751-754. IEEE, (2007)Delay estimation, chip-power analyses and comparison of single-level and multi-level recursive vedic algorithm with conventional algorithms for digital multiplier., and . ICICDT, page 29-32. IEEE, (2018)Secured and Imperceptible Data Transmission Through Digital Audio Signal with Reduced Internal Noise., and . Wireless Personal Communications, 100 (2): 505-518 (2018)ASIC Implementation of High-Speed Adaptive Recursive Karatsuba Multiplier with Square-Root-Carry-Select-Adder., , and . LASCAS, page 1-4. IEEE, (2020)