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Disambiguation of "Nam, Gi-Joon"

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Floorplanning challenges in early chip planning.

, , , , , , and . SoCC, page 388-393. IEEE, (2011)

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Nam-Joon Kim

Valdur Joonso

Maria Joonso

Joon Huh

Jin Nam

 

Other publications of authors with the same name

Two-dimensional position detection system with MEMS accelerometers, readout circuitry, and microprocessor for padless mouse applications., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 13 (10): 1167-1178 (2005)Latch Clustering for Timing-Power Co-Optimization., , , and . DAC, page 1-6. IEEE, (2020)RUMBLE: An Incremental Timing-Driven Physical-Synthesis Optimization Algorithm., , , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 27 (12): 2156-2168 (2008)Cloud-Bursting and Autoscaling for Python-Native Scientific Workflows Using Ray., , , , , , , and . ISC Workshops, volume 13999 of Lecture Notes in Computer Science, page 207-220. Springer, (2023)The nuts and bolts of physical synthesis., , , , , , , , and . SLIP, page 89-94. ACM, (2007)Opportunities in power distribution network system optimization: from EDA perspective., and . ISPD, page 149-150. ACM, (2014)What makes a design difficult to route., , , , , and . ISPD, page 7-12. ACM, (2010)RQL: Global Placement via Relaxed Quadratic Spreading and Linearization., , , , , and . DAC, page 453-458. IEEE, (2007)Graceful Register Clustering by Effective Mean Shift Algorithm for Power and Timing Balancing., , , and . ISPD, page 11-18. ACM, (2019)A Boolean -based layout approach and its application to FPGA routing.. University of Michigan, USA, (2001)