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A 1.2-V 90-MHz Bitmap Index Creation Accelerator with 0.27-nW Standby Power on 65-nm Silicon-On-Thin-Box (SOTB) CMOS., , , , , and . ISCAS, page 1-4. IEEE, (2019)A Flexible High-Bandwidth Low-Latency Multi-Port Memory Controller., , , , and . CoRR, (2017)A Low-Latency Parallel Pipeline CORDIC., , and . IEICE Trans. Electron., 100-C (4): 391-398 (2017)Mobile Robot Motion Control Using a Combination of Fuzzy Logic Method and Kinematic Model., , , and . CoRR, (2022)Coupled fixed point theorems in partially ordered G-metric spaces., and . Math. Comput. Model., 55 (3-4): 1601-1609 (2012)A CORDIC-based QR decomposition for MIMO signal detector., , , and . IEICE Electron. Express, (2018)Low-resource low-latency hybrid adaptive CORDIC with floating-point precision., , , , and . IEICE Electron. Express, 12 (9): 20150258 (2015)Parallel pipelining configurable multi-port memory controller for multimedia applications., , and . ISCAS, page 2908-2911. IEEE, (2015)An Efficient I/O Architecture for RAM-Based Content-Addressable Memory on FPGA., , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 66-II (2): 472-476 (2019)A 1.2-V 162.9 pJ/cycle bitmap index creation core with 0.31-pW/bit standby power on 65-nm SOTB., , , , and . Microprocess. Microsystems, (2019)