Author of the publication

Charge Sharing Fault Analysis and Testing for CMOS Domino Logic Circuits.

, , , and . LATW, page 59-64. IEEE, (2000)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

CKVdd: A Clock-Controlled Self-Stabilized Voltage Technique for Reducing Dynamic Power in CMOS Digital Circuits., and . IEICE Trans. Electron., 92-C (4): 391-400 (2009)Novel Techniques for Improving Testability Analysis., , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 85-A (12): 2901-2912 (2002)Fine resolution double edge clipping with calibration technique for built-in at-speed delay testing., , , and . ASP-DAC, page 367-368. IEEE, (2010)A panoramic endoscope design and implementation for Minimally Invasive Surgery., and . ISCAS, page 453-456. IEEE, (2014)A hierarchy multiple-voltage design technique for low-power performance-manageable bio-chips., and . ICCE-TW, page 1-2. IEEE, (2016)Fine resolution double edge clipping with calibration technique for built-in at-speed delay testing., , and . ITC, page 1. IEEE Computer Society, (2009)Built-in fine resolution clipping with calibration technique for high-speed testing by using wireless testers., and . DSN Workshops, page 81-84. IEEE Computer Society, (2011)Low-Speed Scan Testing of Charge-Sharing Faults for CMOS Domino Circuits., , , and . DFT, page 329-337. IEEE Computer Society, (2000)Noise-Aware Floorplanning for Fast Power Supply Network Design., , , , and . ISCAS, page 2028-2031. IEEE, (2007)A Learnable Unmanned Smart Logistics Prototype System Design and Implementation., , and . AICAS, page 221-224. IEEE, (2019)